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Espressif Systems /ESP32-P4 /TRACE0 /CONFIG

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Interpret as CONFIG

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DM_TRIGGER_ENA)DM_TRIGGER_ENA 0 (RESET_ENA)RESET_ENA 0 (HALT_ENA)HALT_ENA 0 (STALL_ENA)STALL_ENA 0 (FULL_ADDRESS)FULL_ADDRESS 0 (IMPLICIT_EXCEPT)IMPLICIT_EXCEPT

Description

trace configuration register

Fields

DM_TRIGGER_ENA

Configure whether or not enable cpu trigger action.\1: enable\0:disable\
RESET_ENA

Configure whether or not enable trace cpu haverest, when enabeld, if cpu have reset, the encoder will output a packet to report the address of the last instruction, and upon reset deassertion, the encoder start again.\1: enabeld\0: disabled\
HALT_ENA

Configure whether or not enable trace cpu is halted, when enabeld, if the cpu halted, the encoder will output a packet to report the address of the last instruction, and upon halted deassertion, the encoder start again.When disabled, encoder will not report the last address before halted and first address after halted, cpu halted information will not be tracked. \1: enabeld\0: disabled\
STALL_ENA

Configure whether or not enable stall cpu. When enabled, when the fifo almost full, the cpu will be stalled until the packets is able to write to fifo.\1: enabled.\0: disabled\
FULL_ADDRESS

Configure whether or not enable full-address mode.\1: full address mode.\0: delta address mode\
IMPLICIT_EXCEPT

Configure whether or not enabel implicit exception mode. When enabled, do not sent exception address, only exception cause in exception packets.\1: enabled\0: disabled\

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data